DPA Performance Modeling Intern

Summary

Join the Rivos DPA Performance team as a Performance Modeling intern to work on defining performance features for best-in-class RISCV based systems and grow your skills on next-generation Parallel Programmable Accelerators.

Requirements

• Have architecture and microarchitecture knowledge on CPUs
• Possess strong C/C++ programming and debugging skills
• Be proficient in scripting languages such as Perl, Python
• Have experience with performance modeling simulators (plus)
• Understand performance benchmarks and workloads
• Know SystemVerilog and RTL waveform debugging tools (bonus)
• Have excellent problem-solving, written and verbal communication skills
• Be highly self-motivated
• Ability to work well in a team and be productive under aggressive schedules
• Current EE/CS/CE PhD, Master’s Degree, or Bachelor’s Degree student with a background in computer architecture

Responsibilities

• Perform microarchitecture exploration, research, and experimentation
• Correlate between the RTL and performance models, RTL performance debug
• Workload analysis and software optimization involving compilers, libraries, numerics, and other software
• Develop data analysis, visualization, and debug tools, as well as the development of test benches