Senior Process Design Kit LVS Flow Engineer

Summary

Join PsiQuantum and become our experienced PDK LVS Flow engineer. You will develop, validate, and maintain the Layout Versus Schematic (LVS) verification flow within our Photonics Process Design Kits. Your expertise in netlist extraction, comparison, and manipulation is crucial for ensuring a robust design flow, leading to accurate and efficient physical implementations of our leading-edge Photonics circuits. You will utilize your coding skills to establish an LVS verification flow within our design environment and leverage collaborative version control systems. You will support the design and layout teams for LVS-related issues, especially during the tape-out phase. This role requires collaboration with various teams to ensure seamless implementation of our advanced photonics circuits. We are building the first real, useful quantum computers, and this role is critical to our success.

Requirements

• Advanced degree in Computer Science, Electrical Engineering, or a related field
• Minimum of 5 years’ experience in a similar role, with strong focus on LVS
• Experience with Silicon Photonics design, particularly with complex circuits
• Proficiency in Python coding and scripting languages, with a focus on robust, clear, modular and testable code practices
• Required knowledge of KLayout; experience with gdsfactory preferred
• Demonstrated interest in quantum computing
• Highly focused, self-motivated, and detail-oriented
• Proven team player with the ability to work effectively across departments, sites, and time zones
• Excellent verbal and written communication skills

Responsibilities

• Establish and maintain a robust LVS verification flow using Klayout and Python
• Define, implement, and validate netlist extraction rules from our Photonics circuits within the PDK, ensuring precise device and connectivity recognition
• Develop robust tools for comprehensive netlist manipulation, comparison, and verification to ensure alignment between layout and schematic netlists
• Maintain, validate, and release new versions of our PDKs, ensuring accuracy and performance
• Provide support and assistance to layout and design teams throughout the tape-out phase
• Drive essential interactions among our foundry, process, circuit design, layout, and test teams to ensure seamless implementation of our advanced photonics circuits

Benefits

Full time roles are eligible for equity and benefits