Silicon DFT - Intern
at Rivos Inc.

Summary

Join our team as an intern in CPU and SOC DFT design and verification to contribute to the development of innovative features and collaborate with cross-functional teams.

Requirements

• Good knowledge of digital logic design, microprocessor, debug feature, DFT architecture, CPU architecture, and microarchitecture
• Knowledge of DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump
• Knowledge of Verilog and experience with simulators and waveform debugging tools
• Knowledge of Verilog / SystemVerilog
• Knowledge of Python, , Shell scripting, Makefiles, TCL a plus
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
• Ability to work well in a team and be productive under aggressive schedules

Responsibilities

• Design the DFT features
• Create test vectors or oversee their creation
• Collaborate with physical design team to close requirements
• Validate DFT requirements are being met
• Work with designers to increase test coverage, debug observability and flexibility
• Verify post-PD designs meet DFT requirements
• Work with verification engineers, stepping in to do run tests when needed

Benefits

Education and Experience PhD, Master’s or Bachelor’s students in technical subject area