Staff Engineer, FPGA RTL Developer

Summary

Join our hardware design team as a Senior RTL Engineer to develop, test, and optimize FPGA and SoC-based solutions for high-performance applications.

Requirements

• Ability to travel up to 10%
• At least 8+ years of developing RTL designs using Verilog and SystemVerilog for complex digital systems
• 5+ years of experience with C or C++ programming, preferably in embedded systems
• Proficiency in RTL simulation and verification methodologies
• Strong debugging skills for both software and hardware
• Experience with FPGA constraint setup, static timing analysis, and optimizing FPGA builds
• Proficiency with Linux-based design environments
• Design experience with FPGA-based SoCs
• Knowledge of Ethernet or packet-based networking designs for FPGA or ASIC implementations, with a deep understanding of Ethernet and IP packet processing
• Experience with video FPGA designs and video baseband interfaces such as SDI and HDMI
• Domain knowledge in Pro-AV/Broadcast or Imaging solutions is a plus

Responsibilities

• Develop RTL designs using Verilog and SystemVerilog for complex digital systems
• Write and integrate embedded software in C or C++ for hardware interaction, testing, and debugging
• Collaborate with software and firmware teams to ensure seamless integration of hardware and software components
• Constrain FPGAs for static timing analysis and optimize FPGA builds for performance, resource usage, and power efficiency
• Conduct RTL simulations to verify functionality, reliability, and timing
• Collaborate with cross-functional teams, including hardware, software, and QA, to ensure project success

Benefits

• 15 days of vacation, plus 12 days of national holidays
• 40 hrs. of paid sick time off
• Health, dental, and vision insurance
• 401 (k) with company matching
• HSA/ FSA