MIPS is hiring a
Embedded Software Engineer, Web3 - India

Summary

The job is for a Software Engineer to design and implement software components for RISC-V-based CPUs/Platforms. Responsibilities include Linux kernel support, customized Linux distributions, benchmarking, upstream contributions, optimizing software, code review, interacting with architecture and hardware teams, maintaining documentation, and releasing SDK's. Ideal candidates have 3 to 5 years of experience in embedded Linux development, knowledge of Operating System concepts, debugging complex multicore systems, and familiarity with RISC-V ISA.

Requirements

• 3 to 5 years of practical experience in embedded Linux development/debug
• Experience developing architecture-level code or device drivers in C for multiprocessor, multithreaded open-source kernels such as Linux or BSD, with upstream involvement
• Proven experience with upstream development on high-level operating systems such as Linux
• Strong C or C++ programming experience, basic assembly level programming
• Knowledge of basic Operating System concepts (e.g. virtual memory, interrupt handling, privilege levels)
• Experience debugging complex multicore systems, experience with debugging tools (GDB, OpenOCD, Lauterbach)
• Experience with git, Makefile, GNU toolchain and shell scripting
• Experience with device drivers, virtualization, IOMMUs, power management or SoC platform security
• Experience working with hardware architecture and engineering teams
• Strong communication, co-working, and listening skills

Responsibilities

Design and implement software in one or more of the following areas: Linux kernel support for new architectures, customised Linux distributions, deploying pre-existing benchmarks developing new ones as per customer needs, upstream contributions, using emulators and real hardware to analyze and optimize software, code-review complex contributions in any of these areas, interact with architecture and hardware design teams to improve our next RISC-V CPU cores

Preferred Qualifications

• Familiarity with RISC-V ISA. Knowledge of different Instruction Set Architectures (e.g. x86_64, ARM64)
• Experience working with CI/CD and agile tools (Jenkins, Git, Jira)
• Some experience working with virtualisation (e.g. QEMU or hypervisors)
• Any experience with LLVM backend or AI/ML accelerator compilers, delegate run time environments

Benefits

• At MIPS, you’ll be a member of a fast-growing team of technologists that are creating the industry’s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you’ll be able to understand and have an impact on the bigger picture
• A great deal of autonomy, with support from some of the industry’s most experienced CPU engineers
• An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS
• The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers
• At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!