Silicon Formal Verification - Intern

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Rivos Inc.

๐Ÿ“Internship - United States

Job highlights

Summary

Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design.

Requirements

  • Solid understanding of formally specifying and analyzing temporal assertion properties
  • Hands-on experience using model checking tools
  • Experience with interactive theorem provers is a plus
  • Excellent problem-solving skills, along with strong written and verbal communication abilities
  • Excellent organizational skills and high self-motivation
  • Ability to communicate and work well with different design teams
  • PhD, Masterโ€™s Degree, or Bachelorโ€™s Degree in a technical subject area

Responsibilities

  • Work with architects and RTL design engineers to identify, specify, and verify artifacts amenable to formal analysis
  • Prove functional and security properties of the design, find design bugs, and work closely with design teams to deliver high-quality designs

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