Remote Layout Design Engineer

Summary

Join Untether AI as a Staff Layout Design Engineer to develop cutting-edge custom memory and digital layouts, collaborating with a talented team of engineers to tackle complex problems at the intersection of AI and hardware.

Requirements

• 5+ years of experience in 7nm and smaller finFET nodes
• Expertise in using industry standard CAD tools such as Cadence Virtuoso
• Experience with closing LVS, DRC, ERC, SRAM, other PVERF checks on custom designs
• Understanding of EMIR and mitigations
• Linux or Unix

Responsibilities

• Collaborate with circuit designers to understand electrical and physical needs of complex custom memory array designs
• Design custom standard cell compliant transistor level layout meeting strenuous PPA goals
• Drive learning and optimization for physical effects of process variation

Preferred Qualifications

• Experience in digital place and route tools such as Innovus or Fusion Compiler
• Expertise with either Redhawk/Totem or Voltus and interpreting results
• Skill, TCL, python scripting is a plus

Benefits

• 20 vacation days
• Strong health and extended health benefits
• Unlimited sick days
• Stock options