Digital Verification Engineer

Summary

Join Claros, an innovative semiconductor power management solutions company, as a Digital Verification Engineer. This contract position (3-6 months) in Torrance, CA (remote or hybrid) offers a competitive hourly rate ($80-$100). You will be responsible for ensuring the functional correctness and performance of digital integrated circuits for Power Management Integrated Circuits (PMICs). Collaborate with design and validation teams, develop verification plans, create test benches, and analyze RTL designs. The ideal candidate possesses a strong foundation in functional verification and experience with Verilog/SystemVerilog and Cadence simulation tools. Claros offers competitive pay and benefits, including early-stage stock options.

Requirements

• BS or MS in Electrical Engineering, Computer Engineering, or a related field
• Minimum 6-8 years of experience in the field
• Solid understanding of digital logic design (e.g., power control logic, clock/power gating, I²C/SPI/PMBus protocols)
• Experience with Verilog/SystemVerilog and Cadence simulation tools
• Scripting skills (Python, Tcl, Perl, Shell) for automation and regression flows
• Knowledge of power management concepts (LDOs, DCDC converters, sequencing, protection circuits)
• Familiarity with UVM, SystemVerilog classes, or other verification methodologies
• Experience in mixed-signal verification or co-simulation environments

Responsibilities

• Develop, implement, and execute verification plans for digital blocks within PMICs
• Create and maintain test benches, verification environments, and regression tests
• Write directed and constrained-random tests to validate control logic, power state machines, and digital interfaces
• Analyze RTL designs and define appropriate coverage metrics
• Collaborate with analog/mixed-signal teams to verify digital-analog interactions
• Debug design and verification issues, triage simulation failures, and support design closure
• Contribute to verification infrastructure and methodology improvements
• Track and report verification metrics related to HDL code execution & corner cases

Preferred Qualifications

• Excellent analytical and debugging skills
• Effective communication and documentation habits
• Proactive, detail-oriented, and committed to high-quality work
• Comfortable working in cross-functional teams and fast-paced environments

Benefits

• Competitive hourly rate: $80-$100 per hour
• Early-stage stock options