Untether AI is hiring a
Formal Verification Engineer in Canada

Summary

The job description is for a Formal Design Verification Engineer at Untether AI, a company specializing in creating innovative hardware and delivering industry-leading AI performance and efficiency. The position involves using formal verification technologies to perform functional verification of design blocks inside Custom Al IPs. The job is remote and open to applicants from anywhere in North America.

Requirements

• Knowledge of a property checking language such as SystemVerilog Assertion (SVA) and understanding of HDL languages such as SystemVerilog or Verilog
• Familiar with AMBA protocols such as AHB, APB and AXI
• Knowledge of Computer Architecture. Familiar with RISC-V ISA
• Able to use scripting languages such as Python
• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering
• 3+ years' experience with hands-on design verification with 2+ years in formal verification

Responsibilities

• Drive Formal Verification Methodology on multiple components inside Custom AI Inference IP. This includes creating and executing verification plan, debugging issues and coverage closure
• Evaluating various formal verification technologies and flows

Benefits

• 20 vacation days
• Strong health and extended health benefits
• Unlimited sick days
• Stock options
• Building chips and software that will change the world